Current driver for core memory apparatus



May 10, 1966 o. D. PARHAM CURRENT DRIVER FOR CORE MEMORY APPARATUS 3Sheets-Sheet 1 Filed June 12, 1964 Mw/az.

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May 10, 1966 o. D. PARI-IAM CURRENT DRIVER FOR CORE MEMORY APPARATUS 3Sheets-Sheet 2 Filed June 12, 1964 Vaga May 10, 1966 o. D. PARI-IAM3,250,922

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United States Patent O 3,250,922 CURRENT DRIVER FOR CORE MEMORYAPPARATUS D Parham, Downey, Calif., assiguor to Hughes Aircraft Company,Culver City, Calif., a corporation of Delaware Filed June 12, 1964, Ser.No. 374,697 4 Claims. (Cl. 307-885) This invention relates to ahigh-speed current driver for inductive load-s and, more particularly,to a current driver including 1a low voltage `constant-current apparatuscapable of driving a core memory at high speed.

Typical core memory devices invariably present an inductive load to adriving apparatus employed for sensing purposes. In order to achievehigh speed sensing with an inductive load, it has usually been Ifoundnecessary to employ a high voltage power source to overcome theinductive reactance of the load. The use of a high voltage power supplyfurther complicates the switching problern when it is desired to senseat very rapid rates. In addition, the utilization of a high voltagepower supply requires the concommitant use of substantial amounts ofdirect-current electrical energy which, in some applications, isconsidered undesirable.

It is therefore a general object of the present invention to p-rovide animproved high-speed current driver for inductive loads. l l

Another object of the present invention is to provide a current drivingapparatus including a low-voltage constant-current apparatus for corememories.

Still another object of the present invention is to provide a high-speedcurrent driving apparatus for inductive loads utilizing exclusivelysolid state devices.

A further object of the present invention is to provide a high-speedcurrent driving apparatus lhaving an output switching transistor capableof developing a driving pulse therea-cross of amplitude larger than thenormal collectorytocmitter breakdown voltage thereof.

In accordance with the present invention, a constant current is directedthrough an inductance to an output terminal and from the output terminalthrough a switching transistor to ground, the constant current being ofsufficient amplitude to normally maintain the switching transistor in astatur'ated state. A voltage limiter is connected to the output terminalto limit the voltage excursion of the driving pulse generated thereat soas to not exceed .the collector-to-base breakdown voltage of theswitching transistor. In addition, an enhancement-type diode isconnected to the output terminal for the purpose of completelydischarging the storage charge accumulated by the switching transistorprior to cutting off current flow therethrough. In operation, current owthrough the switching transistor is cut otf whereby the chargeaccumulated during the period of current conduction is diverted throughthe enhancement-type diode thereby to allow a voltage greater than thenormal em-itter-to-collector breakdown voltage to be developedthereacross by the collapse of current flow through the indUCtOr. A biasis maintained across the load to prevent current ilow through theenhancement-type diode during the sensing period which lis `terminatedby allowing the switching transistor to again conduct to saturation.

The above-mentioned and other lfeatures and objects olf this inventionand the lmanner of obtaining them will be- 'come more apparent byreference to the following description taken in conjunction with theaccompanying drawings, wherein:

FIG. 1 is la schematic circuit diagram of the apparatus of the presentinvention.

FIG. 2 is the collector characteristic of the switching transistor inthe apparatus o'f FIG. l.

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FIG. 3 illustrates the current conduction characteristic of anenhancement-type diode upon changing from aback to a forward Ibiasthereacross; and

FIG. 4 illustrates various voltage |and current wave- Iforms in theapparatus of FIG. 1.

Referring now to FIG. 1 of the drawings, there is shown a preferredembodiment of the apparatus of the present invention. This apparatusincludes a low voltage constant current apparatus 10 having a powerinput connected to the positive terminal of a battery 11, the negativeterminal of which is referenced to ground. The low voltage constantcurrent apparatus 10 provides la constant current, Il, that is directedthrough an inductor 12 to an outputjunction 13. The inductor 12 may, forexample, have an inductanoe of the order of .80 microhenries. Inaddition to the above, a' switching transistor 14 includes a collec-tor15 connected to the output junction 13, an emitter 16 that is referencedto ground, and a base 17 connected to a junction 18 which is, in turn,connected through diodes 19 and 20 to an input terminal 21. The diodes19, 20 are both poled to allow normal current flow in a directiontowards the input terminal 21. The switching transistor 14 is of a lowstorage variety such as a type designated commercially as ,2N24l0, andthe diodes 19, 20 are of a type having the commercial designation of1N914 lor equivalent. Diodes 19, 20 are connected in series toincreasethe forward voltage drop thereacross when no signal is applied therebyto maintain the transistor 14 in a saturated state as will behereinafter explained. Voltage dropping resistors 22, 23 are connected,respectively, from the positive terminal of the battery 11 to thejunction 18, and from junction 18 to the .negative terminal of a battery24, an intermediate terminal of which is referenced to ground. Inparticular, resistors 22, 23 have ohmic Values of 300 ohms and 2000ohms, respectively, and the negative terminal of battery 24 provides apotential .of the order of -3 volts relative to ground. As previouslyspecified, the positive terminal rof battery 11 provides a potential ofthe order of +10 volts relative to ground whereby the base 17 oftransistor 14 is maintained positive by the forward voltage dr-op acrossthe diodes 19, 20 when the input terminal 21 is at zero volts.

Further,` in order to limit thevoltage developed lat the collector 15 oftransistor 14 to a potential, for example, of +60 volts relative toground, the output junction 13 is connected through a diode 2,5 to thepositive terminal of a `battery 26, the negative terminal of which isreferlenced to ground. In this case, the diode 25 is poled to allowcurrent ow towards the positive terminal of battery 26 which develops avoltage of the order of 60 volts relative to ground. Lastly, anenhancement-type diode 29 is connected to output junction 13 and througha variable resistor 28 to the positive terminal of battery 11 whichdevelops a potential of the order of +10 volts relative to ground. Theenhancement-type diode 29 may Abe of a type designated commercially asFD300 and which has current waveforms of the type illustrated in FIG. 3.

Referring to FIG. 3, a current through the enhancement-type diode 29 inthe forward direction results in a positive potential voltage dropthereacross which increases proportionately as illustrated by a forwardcurrent characteristic 30. A current, I2, flowing through diode 29 in aforward direction develops a voltage drop of the order of V2 volts, asshown in the ligure. Enhancementtype diode 29 is characterized in thatupon reversal of the biasv thereacross, a current I3, ows therethroughin the opposite direction for a period, AT, as illustrated by currentwaveform 31, FIG. 3. In general, the amplitude of current, I3, ischaracteristic of a particular enhancementtype diode and the timeinterval, AT, is determined by the forward current, I2, flowingtherethrough prior to the ltime biasv -across the diode 29 was reversed.Thus, the

time interval, AT, can be adjusted by means of the variable resistor 28which determines the forward current ow through enhancement-type diode29. In order to provide a low impedance path for the reverse currentpulse which flows through the enhancement diode 29 upon reversal yof thebias thereacross, a diode 32 is connected from the junction betweenvariable resistor 28 and enhancement-type diode 29 to the positiveterminal of the battery 24 which develops of :the order of +2 voltsrelative to ground.

The high-speed driving current apparatus of the invention is primarilydesigned t-o drive an inductive load. Accordingly, an inductive load 34,which may comprise an associative memory, is connected to the outputjunction 13. Inductive load 34 includes networks 351, 352, 351 each ofwhich includes, connected from output junction 13 in the order named, adiode 36, an inductive load 37 constituting a series of corememoryelements to be sensed, and a plane switch 38 which in each case isconnected to the positive terminal of a battery 40 which provides a biaspotential of +4 volts, the negative terminal of which is referenced toground. The switches '38 Iare, in turn, controlled by a control network42. In the drawing, the elements 36, 37, 38 have subscriptscorresponding to the branch in which they are located. Also, the diodes361, 362 36n are poled to allow normal current flow in a direction awayfrom the output junction 13.

It is evident that any constant current apparatus may be employed toprovide the constant current, I1, directed through inductor 12 of thepresent invention. lIt is often necessary, however, to generate aconstant current from a low voltage source, particularly incircumstances where solid state circuitry is employed. In accordancewith the present invention, -the low voltage constant current apparatushas an input junction 50 that is connected to the positive terminal ofbatter 11 which is maintained at 10 volts relative to ground; an inputjunction 52 that is connected to the positive terminal of battery 24which provides a potential of +2 volts relative to ground; and an outputterminal 54 that is connected to the inductor 12.

The low voltage constant current apparatus 10 includes a pfn-ptransistor 56 including an emitter 57 connected to input junction 50, abase 58, and a collector 59 connected through a resistor 60 to theoutput terminal 54. The transistor 56 may be any high power silicon orgermanium transistor such as, for example, a type designatedcornmercially as 2N2696. The ohmic value of resistor 60 is of the orderof 10 ohms.

In addition, -a Zener diode 62 is connected to output terminal 54 andthrough a resistor 63 to the input junction 50. The resistor 63 has anohmic value of the order of 560 ohms and the Zener diode 62 is of a typewhich maintains 6 volts thereacross when minimum current owstherethrough. A Zener diode having this characteristic is designatedcommerically as 1N746A. Also, the low voltage constant current apparatus10 includes n-p-n `transistors 65, 66 having collectors 67, 68, bases69, 70,

and emitters 71, 72, respectively, the emitters being connected toground through a common resistor 73 having an ohmic value vof 82 ohms.The base 69 of transistor 65 is connected to the junction intermediatethe Zener diode 62 and resistor 63, and the collector 67 is connected tothe base 58 of transistor 56 and through a resistor 78 of ohmic value1000 ohms to the input junction 50. The

base 70 of transistor 66, on the other hand, is connected to thejunction between resistor 70 and collector 59 of transistor 56, and thecollector 68 of transistor 66 is connecteddirectly to input junction 50.A resistor 80 of ohmic value 2200 ohms and a diode 81 are seriallyconnected in the order named from the input junction 50 toenhancement-type diode 82 is then connected from the junctionintermediate the resistor 80 and the diode 81 to the output terminal 54.The enhancement-type diode 82 is poled in a manner to provide a path forcurrent owing through Zener diode 62 during instants when current ow atthe output terminal 54 is interrupted.

In the operation of the low voltage current apparatus 10, a constantpotential of 6 volts is developed across the Zener diode 62. Thispotential is applied to the base 69 of transistor 65, the collector ofwhich is connected to the base 58 of transistor 56, the collector 59 ofwhich is connected to one extremity of the resistor 60. In that theremaining extremity of-Zener diode 62 is connected -the input junction52, the diode 81 being poled to allow across the resistor 60, themaximum Voltage that may be developed thereacross is limitedsubstantially to the voltage across the Zener diode 62. Theenhancement-type diode 82 provides a path for the current flow throughZener diode `62 when the current flow I1, into the inductor 12, is cutoff and the potential at output terminal 54 increases above +2 voltsrelative to ground. In addition, the emitter 72 of transistor 66 isconnected directly to the emitter 71 of transistor 65, the base 69 ofwhich is connected to the Zener diode 62. The collector 68 of transistor66, on the other hand, is connected directly to the positive terminal ofbattery 11 which develops a potential of +10 volts relative to ground,whereby the base provides current to prevent the voltage developedacross resistor 60 from falling below that developed across the Zenerdiode 62. Thus, in that the voltage across resistor 60 is maintainedconstant and equal to that developed across the Zener diode 62, it isevident that the current owing through resistor 60 is of constantamplitude. From the foregoing description, it is evident that thevoltage requirements of the apparatus 10 may be decreased still furtherby employing a Zener diode that develops a lower voltage thereacrossthan that developed by the Zener diode 62.

In the operation of the low voltage high speed current driver of thepresent invention, the voltage dividing network formed by resistors 22,23 apply a voltage to the base 17 of transistor 14 to maintain the base17 positive relative =to the emitter 16 thereof when `the input 21 ismaintained at substantially zero volts relative to ground. Under thesecircumstances, the constant current apparatus 10 develops a constantcurrent, I1, which flows through the inductor 12 and through thetransistor 14 to ground. In order to initiate the driving current pulsethrough the inductive load 34, a control signal having a waveform 50,FIG. 4, which has a negative excursion of -2 volts from 0 volts isapplied tothe input 21. During the interval that the control signal ofwaveform 50 is at -2 volts relative to ground, the junction 18 and,hence, the base 17 of tran- .sistor 14 are pulled negative relative toground thereby shutting oi current ow through transistor 14.

Referring to FIG. 2, the characteristics 51, 52, 53, 54 and 55illustrate the collector-to-base breakdown voltage, VCBO, for variouscollector currents. These breakdown voltages are the maximum voltages atthe respective right extremities of the characteristics 51-55, as viewedin the drawing. As is evident from the characteristics 51-55, decreasingvalues of collector current correspond to increasingly highercollector-to-base breakdown voltages. A transistor, such as transistor14, conducting in the saturated condition stores a predetermined chargewhich must be discharged as collector current to achieve maximum buildup of voltage thereacross, as illustrated by characteristic 55, FIG. 2.In order to achieve this build up of voltage in the apparatus of thepresent invention, the interruption of current ow through inductor 12reverses the bias across enhancement diode 29 which then draws currentillustrated by the waveform 56, FIG. 4,

vwhich corresponds to the negative flow of current through enhancementdiode 29 shown by waveform 31, FIG. 3. The current through enhancementdiode 29 in the forward direction is determined by the variable resistor28 and,

in turn, controls the width of the waveform 56. The current is adjustedthrough enhancement diode 29 i-n the forward direction along thecharacteristic 30, FIG. 3, to a value of I2 which corresponds to a widthof the waveform S6 sufiicient to completely discharge the charge storedby transistor 14. In that this current corresponding to waveform 56fiows through diode 32 to the positive terminal of battery 24 maintained`at +2 volts relative to ground, the initial voltage waveform 58developed at the load 34 is +2 volts as illustrated by the portion 59 ofthe waveform 5S. This discharge of the charge stored by transistor 14 isachieved in less than 100 nanoseconds.

After current flow through enhancement diode 29 in the reverse directionhas terminated, the rate of change of current decrease through inductor12 produces a pulse illustrated by portion 60 of waveform 58, FIG. 4,which normally could have a positive excursion of from 80 to 110 volts.In the event the transistor 14 has not been completely turned ofi, thetransistor 14 will latch-up, i.e., there will be a breakdown ofcollector-to-emitter voltage at approximately 40 volts, as illustratedby the characteristics 52, S3, FIG. 2. By completely discharging thestored charge in transistor 14, the voltage build-up thereacross may bemuch greater as illustrated by characteristic 55, FIG. 2. In order toinsure that the breakdown voltage, VCBO, of characteristic 55 is notexceeded, the positive excursion developed at the load 34 is limited to60 volts by the limiting action of diode 25 and battery 26. The risetime of pulse 60 requires from 20 to 30 nanoseconds. The pulse 60remains at 60 volts for a' peri-oddetermined -by the inductance ofinductor 12 and the magnitude of the current, I1, initially iiowingtherethrough. In the present case, the pulse 60 remains at 60 volts fora period of 30 to 40 nanoseconds, the time required for a currentthrough the inductive load 34, as illustrated by waveform 62, to reach amagnitude of IL. The control 4Z determines the branch of the inductiveload that is sensed by closing the switch 38 corresponding thereto. Theswitch 38 back-biases the corresponding diode 36 from battery 40 wherebythe voltage at the load decreases to only 4 volts during the remainderof the sense pulse 60, as illustrated by portion 64 of waveform 58, FIG.4. In the present example, the decrease of pulse 60 from 60 volts to 4volts required only from 20 to 30 nanoseconds. Also, the current, IL,flowing through inductive load 34 remains constant and substantiallyequal to I1 for the remainder of the control signal of waveform 50,after which time there is an exponential decrease to zero. Thus, eventhough a comparatively low Voltage source of power, such as battery 11,is employed, current fiow through inductive load 34 increases to itsmaximum amplitude in an extremely short interval of time. In actualduration, this interval of time is less than the width of the pulse 60of waveform 58, FIG. 4. Pulse 60, as previously described, issubstantially higher than the collector-to-base breakdown voltagecapable of producing latch-up of the switching transistor 14.

Although the invention has been shownlin connection with a certainspecific embodiment, it will be readily apparent to those skilled in theart that various changes in form and arrangement of parts may be made tosuit requirements without departing from the spirit and scope of theinvention.

What is claimed is:

1. A high-speed current driving apparatus comprising an inductor havingfirst and second terminals; a transistor having a collector, an emitterand a base, said emitter and collector being connected between saidsecond terminal of said inductor and a reference junction maintained ata substantially constant reference potential level and said base beingbiased to allow saturation current to flow through said transistor;means connected to said first terminal of said inductor for normallymaintaining a substantially constant current flow therethrough; anenhancement-type diode connected between said second terminal of saidinductor and a first junction, said enhancementtype diode being poled ina direction to be back-biased upon the interruption of current flowthrough said inductor; means connected to said first junction forlimiting Voltage excursions thereat to a predetermined potential leveland for producing a residual current flow in a forward direction throughsaid enhancement-type diode; a utilization device to be driven connectedbetween said v second terminal of said inductor and a second junctionmaintained at a potential level capable of backbiasing saidenhancement-type diode; 'and means connected to said fbase of saidtransistor for interrupting current flow therethrough thereby toinitiate a driving current through said utilization device.

2. The high-speed current driving apparatus as deiined in claim 1additionally including means connected to said second terminal of saidinductor for limiting the maximum voltage generated thereat to a voltageless than the collector-to-base breakdown voltage of said transistor atsubstantially zero collector current.

' 3. The high-speed current driving apparatus as defined in claim 2wherein said means connected to said first terminal of said firstinductor for normally maintaining a substantially constant current flowtherethrough includes first and second input terminals and an outputterminal, said output terminal being connected to said first terminal ofsaid inductor; a p-n-p type transistor having an emitter, a collectorand a base, said emitter being connected to said first input terminal; afirst resistor of comparatively -low ohmic value connected from saidcollector of said p-n-p type transistor to said output terminal; asecond resistor of comparatively high ohmic value and a Zener diodeserially connected in the order named from said first input terminal tosaid output terminal; first and second n-p-n type transistors havingfirst and second collectors, first and second bases and first and secondemitters, respectively, said first base of said first n-p-n transistorbeing connected to the junction between said Zener diode and said secondresistor, said first collector being connected to said base of saidp-n-p transistor, said second collector being connected to said firstinput terminal, said second base being connected to said collector ofsaid p-n-p transistorand said first and second emitters connectedthrough a common bias resistor to ground; a third resistor ofcomparatively high ohmic value connected from said first collector tosaid first input terminal; a fourth resistor of comparatively high ohmicvalue and a diode serially `connected in the order named from said firstto said second input terminals, said diode being poled to allow normalcurrent flow toward said second input terminal; an enhancement-typediode connected from the junction between said fourth resisto-r and saiddiode and said output terminal, said enhancement-type diode being poledto allow current tiow towards said output terminal; means connected tosaid first input terminal for applying aA first direct-current voltageof positive polarity thereto, said first direct-current voltage beinggreater than the rated voltage developed across said Zener diode; andmeans connected to said second input terminal for applying a seconddirect-current voltage of positive polarity thereto of amplitude lessthan said first direct-current voltage whereby a substantially constantcurrent flows through said first resistor towards said output termin-al.

4. A high-speed current driving apparatus comprising an inductor havingfirst and second terminals; an n-p-n type transistor having a collector,an emitter and a base, said collector being connected to said secondterminal of said inductor and said emitter being connected to ground;means connected to said first terminal of said first inductor fornormally maintaining substantially constant current flow therethroughfrom said first to said second terminals thereof; signal control meansconnected to said base of said transistor, said signal control meanshaving a rst level for allowing saturation current to iiow through saidtransistor and a second level for cutting off said current ow; anenhancement-type diode connected between said second terminal of saidinductor and a rst junction, said enhancement-type diode being poled toallow normal current ow in a direction towards said second terminal ofsaid inductor; means connected to said rst junction for limitingpositive voltage excursion thereat to a predetermined potential leveland for producing a residual current ow in a forward direction throughsaid enhancement-type diode; a utilization device to be driven connectedbetween said second terminal of said inductor and a second junctionmaintained at a potential level slightly positive relative to saidpredetermined potential level whereby a driving current is initiatedthrough said utilization device in response to the cutting oit of saidcurrent through said n-p-n type transistor by said signal control means.

References Cited by the Examiner UNITED STATES PATENTS 2,866,105 12/1958Eckert 307-885 3,124,698 3/1964 Semmer et al. 307-885 3,174,094 3/ 1965Farnsworth et al. 307-885 i 3,191,062 6/1965 Forge 307-885 3,205,374 9/1965 Cajal et al. 307-885 FOREIGN PATENTS 927,468 5/ 1963 GreatBritain.

OTHER REFERENCES Electronic Design, Problems in Designing High SpeedComparators, by Wait et al., Aug. 30, 1963; pages 41-45 relied on.

JOHN w. HUCKERT, Primary Examinar. ARTHUR GAUss, J. D.l CRAIG, AssisiamExaminers.

1. A HIGH-SPEED CURRENT HAVING APPARATUS COMPRISING AN INDUCTOR HAVINGFIRST AND SECOND TERMINALS; A TRANSISTOR HAVING A COLLECTOR, AN EMITTERAND A BASE, SAID EMITTER AND COLLECTOR BEING CONNECTED BETWEEN SAIDSECOND TERMINAL OF SAID INDUCTOR AND A REFERENCE JUNCTION MAINTAINED ATA SUBSTANTIALLY CONSTANT REFERENCE POTENTIAL LEVEL AND SAID BASE BEINGBIASED TO ALLOW SATURATION CURRENT TO FLOW THROUGH SAID TRANSISTOR;MEANS CONNECTED TO SAID FIRST TERMINAL OF SAID INDUCTOR FOR NORMALLYMAINTAINING A SUBSTANTIALLY CONSTANT CURRENT FLOW THERETHROUGH; ANENHANCEMENT-TYPE DIODE CONNECTED BETWEEN SAID SECOND TERMINAL OF SAIDINDUCTOR AND A FIRST JUNCTION, SAID ENHANCEMENTTYPE DIODE BEING POLED INA DIRECTION TO BE BACK-BIASED UPON THE INTERRUPTION OF CURRENT FLOWTHROUGH SAID INDUCTOR; MEANS CONNECTED TO SAID FIRST JUNCTION FORLIMITING VOLTAGE EXCURSIONS THEREAT TO A PREDETERMINED POTENTIAL LEVELAND FOR PRODUCING A RESIDUAL CURRENT FLOW IN A FORWARD DIRECTION THROUGHSAID ENHANCEMENT-TYPE DIODE; A UTILIZATION DEVICE TO BE DRIVEN CONNECTEDBETWEEN SAID SECOND TERMINAL OF SAID INDUCTOR AND A SECOND JUNCTIONMAINTAINED AT A POTENTIAL LEVEL CAPABLE OF BACKBIASING SAIDENHANCEMENT-TYPE DIODE; AND MEANS CONNECTED TO SAID BASE OF SAIDTRANSISTOR FOR INTERRUPTING CURRENT FLOW THERETHROUGH THEREBY TOINITIATE A DRIVING CURRENT THROUGH SAID UTILIZATION DEVICE.